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ds04-27701-4e fujitsu semiconductor data sheet assp for power management applications (secondary battery) dc/dc converter ic for charging mb3832a n n n n description the mb3832a is a pulse width modulation (pwm) dc/dc converter ic, incorporating a current detector amplifier and error amplifiers (2 circuits) to control the output voltage and current independently. it is suitable for down- conversion. with an on-chip reference voltage generator, the mb3832a is best suited for use in applications such as lithium- ion battery (1-cell to 3-cell) chargers. n n n n features ? high precision reference voltage source: 2.5 v 0.5% (+25 c) : 2.5 v 1.0% (C10 c to +85 c) ? high frequency operating capability: 500 khz max. ? wide operating supply voltage range: 3.6 v to 18 v ? on-chip current detector amplifier with wide in-phase input voltage range: 0 v to v cc ? on-chip standby function ? on-chip triangular waveform oscillator capable of operating in external synchronization ? on-chip, timer-latch short-circuit protection circuit ? internal totem-pole output stage supporting p-channel mos fets and pnp transistors n n n n pac k ag e 20-pin plastic ssop (fpt-20p-m03)
mb3832a 2 n n n n pin assignment vref : 1 (top view) (fpt-20p-m03) rt : 2 ct : 3 sync : 4 cscp : 5 fb1 : 6 - in1 : 7 + in1 : 8 - inc : 9 + inc : 10 20 : ve 19 : out 18 : v cc 17 : ctl 16 : dtc 15 : fb2 14 : - in2 13 : + in2 12 : cout 11 : gnd
mb3832a 3 n n n n pin description i: input pin, o: output pin pin no. pin name i/o descriptions 1 vref o reference voltage output terminal 2 rt connection terminal for triangular wave frequency setting resistor 3 ct connection terminal for triangular wave frequency setting capacitor 4 sync i external synchronous signal input terminal 5cscp connection terminal for time constant setting capacitor for timer-latch short- circuit protection circuit 6 fbi o error amplifier 1 output terminal 7 Cin1 i error amplifier 1 inverted input terminal 8 +in1 i error amplifier 1 non-inverted input terminal 9 Cinc i current detector amplifier inverted input terminal 10 +inc i current detector amplifier non-inverted input terminal 11 gnd ground terminal 12 cout o current detector amplifier output terminal 13 +in2 i error amplifier 2 non-inverted input terminal 14 Cin2 i error amplifier 2 inverted input terminal 15 fb2 o error amplifier 2 output terminal 16 dtc i connection terminal for dead time/soft start time setting resistor/capacitor 17 ctl i power supply control input terminal h level: active state l level: standby state 18 v cc power supply terminal 19 out o totem-pole output terminal 20 ve connector terminal for output sink current setting resistor
mb3832a 4 n n n n block diagram - + - + - + - - + - + + + + - 15 14 13 6 7 8 16 5 4 20 19 18 2 3 1 11 12 9 10 17 fb2 - in2 - in1 + in1 dtc cscp 1 m a bias sr latch uvlo osc ref ctl sync rt ct vref bias 1.9 v 1 v 1.3 v v cc gnd 2.5 v ctl ve out v cc 2.1 v 1.1 v scp comp. dtc comp. fb1 out current amp. error amp.2 error amp.1 pwm comp. 25 100 k w + inc - inc cout + in2
mb3832a 5 n n n n absolute maximum ratings *: when mounted on a 10 cm-square dual-sided epoxy base board warning: semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. n n n n recommended operating conditions warning: the recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. all of the devices electrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating condition ranges. operation outside these ranges may adversely affect reliability and could result in device failure. no warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their fujitsu representatives beforehand. parameter symbol condition rating unit min max power supply voltage v cc 20v control input voltage v ctl 20v output current i o out terminal, dc 50 ma peak output current i o out terminal, duty 5% 600 ma allowable dissipation p d ta +25 c 540* mw storage temperature tstg C55 +125 c parameter symbol condition value unit min typ max power supply voltage v cc 3.61618v reference voltage output cur- rent i or C10ma input voltage v in +in1, Cin1, +in2, Cin2 terminal 0v cc C 0.9 v +inc, Cinc terminal 0 v cc v control input voltage v ctl ctl terminal 0 18 v sync input voltage v sync sync terminal 0 v cc v output current i o out terminal, dc 30 ma oscillator frequency f osc 10 200 500 khz timing capacitance c t 100 390 2200 pf timing resistance r t 8.21251k w short detection capacitance c scp 0.11.0 m f operating temperature ta C30 +25 +85 c
mb3832a 6 n n n n electrical characteristics (v cc = 16 v, ta = +25 c) *: standard design value (continued) parameter symbol pin no. condition value unit min typ max reference voltage block (ref) output voltage v ref 1 ta = +25 c 2.48752.502.5125v ta = C10 c to +85 c 2.475 2.50 2.525 v ta = +25 c to +85 c 2.480 2.50 2.520 v input stability line 1 v cc = 3.6 v to 18 v 1 10 mv load stability load 1 i ref = 0 ma to C1 ma 3 10 mv short circuit output current i os 1v ref = 0 v C36 C16 C7 ma under voltage lockout circuit block (uvlo) threshold voltage v th 16 v cc terminal 2.8 3.1 v v tl 16 v cc terminal 2.3 2.6 v hysteresis width v h 16 v cc terminal 80 200 mv reset voltage v rst 19 v cc terminal 1.7 2.1 v short detection block (scp comp, s-r latch) detection voltage v th 5 fb terminal 2.0 2.1 2.2 v threshold voltage v th 5 cscp terminal 0.65 0.70 0.75 v input standby voltage v stb 5 cscp terminal 50 100 mv input latch voltage v i 5 cscp terminal 50 100 mv input source current i cscp 5 cscp terminal C1.4 C1.0 C0.6 m a triangular wave oscillator block (osc) oscillator frequency f osc 19 c t = 330 pf, r t = 12 k w 190 200 210 khz frequency input stability d f/f 19 v cc = 3.6 v to 18 v 1 5 % sync input condition v ih 19 input h level 2.0 v v il 19 input l level 0 0.8 v input current i sync 4v sync = 5 v 50 100 m a error amplifier (error amp.1, 2) input offset voltage v io 8, 7, 13, 14 v fb = 1.6 v C3 3 mv input bias current i b 8, 7, 13, 14 v fb = 1.6 v C200 C50 na common mode input voltage range v cm 8, 7, 13, 14 0 v cc C 0.9 v common mode rejection ratio cmrr 6, 15 60 100 db voltage gain a v 6, 15 dc 60 100 db frequency bandwidth bw 6, 15 a v = 0 db 750* khz maximum output voltage width v om + 6, 15 2.5 2.7 v v om C 6, 15 0.8 1.0 v output source current i om C 6, 15 v fb = 1.6 v C120 C60 m a output sink current i om + 6, 15 v fb = 1.6 v 0.6 2.0 ma
mb3832a 7 (continued) (v cc = 16 v, ta = +25 c) (continued) parameter symbol pin no. condition value unit min typ max current detector amplifier block (current amp.) input offset voltage v io 10, 9 v +inc , v Cinc = 2.4 v to 12.6 v C2 2 mv input bias current i +inc 10 v +inc = 12.7 v, v Cinc = 12.6 v 1 2 m a i Cinc 9 v +inc = 0.1 v, v Cinc = 0 v C2 C1 m a output voltage v o1 12 v +inc = 12.7 v, v Cinc = 12.6 v 2.25 2.5 2.75 v v o2 12 v +inc = 12.8 v, v Cinc = 12.6 v 4.5 5.0 5.5 v v o3 12 v +inc = 0.1 v, v Cinc = 0 v 2.25 2.5 2.75 v v o4 12 v +inc = 0.2 v, v Cinc = 0 v 4.5 5.0 5.5 v common mode input voltage range v cm 10, 9 0 v cc v common mode rejection ratio cmrr 12 v +inc , v Cinc = 2.4 v to 12.6 v 60 90 db voltage gain a v 12 v Cinc = 12.6 v 22.5 25 27.5 v/v frequency bandwidth bw 12 a v = 0 db 500* khz output resistance r o 12 f = 10 khz 20* w maximum output voltage width v om + 12 v cc C 2.0 v cc C 1.6 v v om C 12 50 200 mv output source current i om C 12 v cout = 2.5 v C7 C2 ma output sink current i om + 12 v cout = 2.5 v 60 170 m a pwm comparator block (pwm comp.) threshold voltage v t0 19 duty cycle = 0 % 1.2 1.3 v v t100 19 duty cycle = 100 % 1.9 2.0 v input bias current i dtc 16 v dtc = 0.4 v C1.0 C0.2 m a latch mode input current i dtc 16 v dtc = 2.5 v 270 900 m a input latch voltage v dtc 16 i dtc = 100 m a 0.15 0.3 v on duty cycle dtr 19 v dtc = v ref /1.56 43 48 53 %
mb3832a 8 (continued) (v cc = 16 v, ta = +25 c) *: standard design value parameter symbol pin no. condition value unit min typ max output block (out) output on resistance r on 19 i o = C50 ma 5 8 w output sink current i o 19 r e = 33 w 18 30 42 ma output voltage v oh 19 i o = C300 ma 12.5 14 v v ol 19 i o = 300 ma 1.2 1.8 v control-off output resistance r out1 19 v ctl = 0 v, v ref = 2.5 v, i o = C50 ma 5 8 w r out2 19 v ctl = 0 v, v ref = 0 v, i o = C10 m a 70 100 130 k w control block (ctl) ctl input condition v on 1 ic is active state 2.0 18 v v off 1 ic is standby state 0 0.8 v input current i ih 17 v ctl = 5 v 100 200 m a i il 17 v ctl = 0 v C1 0 m a general standby current i ccs 18 v ctl = 0 v 10 m a power supply current i cc 18 output h 4.6 7.0 ma
mb3832a 9 n n n n typical characteristics (continued) 5 4 3 2 1 0 0 5 10 15 20 ctl = v cc ta = + 25 c i ref = 0 ma reference voltage vs. power supply voltage characteristics reference voltage vs. v ref load current characteristics 5 4 3 2 1 0 010203040 v cc = 16 v ctl = 5 v ta = + 25 c power supply voltage v cc (v) reference voltage v ref (v) reference voltage d v ref (%) reference voltage v ref (v) control current i ctl ( m a) reference voltage v ref (v) v ref load current i ref (ma) reference voltage vs. temperature characteristics reference voltage vs. control voltage characteristics control current vs. control voltage characteristics 2.0 1.5 1.0 0.5 0.0 - 0.5 - 1.0 - 1.5 - 2.0 - 40 - 20 0 20 40 60 80 100 v cc = 16 v ctl = 5 v 5 4 3 2 1 0 0 5 10 15 20 v cc = 16 v ta = + 25 c i ref = 0 ma 500 400 300 200 100 0 0 5 10 15 20 v cc = 16 v ta = + 25 c control voltage v ctl (v) control voltage v ctl (v) temperature ta ( c)
mb3832a 10 (continued) 1 m 100 k 10 k 1 k 1 k 10 k 100 k c t = 100 pf c t = 390 pf c t = 2200 pf v cc = 16 v ctl = 5 v 1 m 100 k 100 p 10 k 10 n 10 p 1 k 1 n v cc = 16 v ctl = 5 v r t = 12 k w 3.0 2.0 1.0 0.0 - 1.0 - 2.0 - 3.0 0 2 4 6 8 101214161820 ctl = v cc r t = 12 k w , c t = 390 pf 220 215 210 205 200 195 190 185 180 - 40 - 20 0 20 40 60 80 100 r t = 12 k w , c t = 390 pf v cc = 16 v ctl = 5 v 2.5 2.0 1.5 1.0 0.5 1 k 10 k 100 k 1 m 10 m v cc = 16 v ctl = 5 v triangular wave oscillation frequency vs. r t resistance characteristics triangular wave oscillation frequency regulation vs. power supply voltage characteristics triangular wave maximum/minimum voltages vs. triangular wave oscillation frequency characteristics triangular wave oscillation frequency vs. c t capacitance characteristics triangular wave oscillation frequency vs. temperature characteristics triangular wave oscillation frequency f osc (hz) triangular wave oscillation frequency regulation d f osc (%) triangular wave upper and down voltage (v) triangular wave oscillation frequency f osc (hz) triangular wave oscillation frequency f osc (khz) r t resistance ( w ) power supply voltage v cc (v) triangular wave oscillation frequency f osc (hz) upper lower c t capacitance (f) temperature ta ( c)
mb3832a 11 (continued) 40 30 20 10 0 100 a v 10 k 1 k 1 m 10 m 100 k - 10 - 20 - 30 - 40 v cc = 16 v ctl = 5 v t a = + 25 c f 180 135 90 45 0 - 45 - 90 - 135 - 180 8 6 5 v 11 k w 11 k w 240 k w 2.4 k w (13) (15) 2.5 v 1 m f - + 7 (14) in out err amp.1 (err amp.2) 3.0 2.8 2.6 2.4 2.2 2.0 0481216 v cc = 16 v v + inc = v - inc + 0.1 v t a = + 25 c 50 40 30 20 10 0 - 10 - 20 - 30 - 40 - 50 100 1 k 10 k 100 k 1 m 10 m 180 135 90 45 0 - 45 - 90 - 135 - 180 a v f + - + - 10 9 12 12.6 v 0.1 v 2 12.5 out current amp. in error amp. gain, phase vs. frequency characteristics current detector amp. gain, phase vs. frequency characteristics current detector amp. output voltage vs. input voltage characteristics gain av (db) gain av (db) output voltage v cout (v) frequency f (hz) frequency f (hz) inverting input voltage (v) phase f (deg.) phase f (deg.)
mb3832a 12 (continued) allowable dissipation vs. ambient temperature characteristics allowable dissipation p d (mw) ambient temperature ta ( c) 600 540 500 400 300 200 100 0 - 40 - 20 0 20 40 60 80 100 120
mb3832a 13 n n n n functional description 1. switching regulator functions (1) reference voltage circuit (ref) the reference voltage generator uses the voltage supplied from the v cc terminal (pin 18) to generate a temper- ature-compensated, stable voltage (about 2.50 v) as the reference supply voltage for the ics internal circuitry. the reference voltage can be output, up to 1 ma, to an external device through the vref terminal (pin 1). (2) triangular wave oscillator (osc) the triangular wave oscillator generates a triangular waveform with a timing capacitor and a timing resistor respectively connected to the ct terminal (pin 3) and rt terminal (pin 2). the triangular wave is input to the pwm comparator in the ic while it can also be supplied to an external device through the ct terminal. in addition, the oscillator can be used for external synchronization, where it generates a triangular wave synchronous to the input signal from the sync terminal (pin 4). (3) error amplifiers (error amp. 1, 2) the error amplifiers detect the output voltage from the switching regulator and outputs the pwm control signal. it supports a wide range of in-phase inputs from 0 v to v cc C 0.9 v. an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the fb1 terminal (pin 6) [fb2 terminal (pin 15)] to the Cin1 terminal (pin 7) [Cin2 terminal (pin 14)] of the error amplifier, enabling stable phase compensation to the system. (4) current detector amplifier (current amp.) the current detector amplifier provides 25 amplification of the voltage drop between the two ends of the output sensor resistor (rs) in the switching regulator, that occurs due to the flow of the charging current. at the same time, the amplifier converts the voltage to the gnd-reference voltage level and outputs it to the cout terminal (pin 12). it can also control the charging current in combination with the error amplifier circuit. (5) power control circuit (ctl) the power control circuit can control turning on and off the power supply through the ctl terminal (pin 17). (supply current in standby mode: about 0 m a) depending on the voltage level of the pwm comp. input terminal, the out terminal (pin 19) may become l level during discharging of the v ref voltage after the ctl terminal is turned off with a capacitor connected to the v ref terminal. the power control circuit contains a function for fixing the out output terminal to the h level when ctl = l and vref = h, preventing inadvertent l level output after turning the ctl terminal off. (6) pwm comparator circuit (pwm comp.) the pwm comparator circuit is a voltage-pulse width converter for controlling the output duty of the error amplifiers (error amp. 1, 2) depending on their output voltage. the pwm comparator circuit turns on the external output transistor during the interval in which the triangular wave voltage level is lower than the voltage level at both of the error amplifier output terminals (fb1 terminal (pin 6), fb2 terminal (pin 15)) and the dtc terminal (pin 16). (7) output circuit (out) the output circuit uses a totem-pole configuration, capable of driving an external p-channel mos fet and pnp transistor. it can also control the output sink current with a resistor connected between the ve terminal (pin 20) and the gnd terminal (pin 11).
mb3832a 14 2. protection functions (1) low input voltage malfunction preventive circuit (ulvo) the transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned on, may cause errors in the control ic, resulting in breakdown or degradation of the system. the low input voltage malfunction preventive circuit detects the internal reference voltage level according to the supply voltage and turn off the external output transistor to make dead time 100%. the circuit restores voltage supply when the supply voltage reaches its threshold voltage. (2) timer-latch short-circuit protection circuit (scp comp., sr latch) the latch circuit detects the output voltage levels of the error amplifiers. when the output voltage levels of the two error amplifiers reach about 2.1 v at the same time, the timer circuit is actuated to start charging the external capacitor connected to the cscp terminal (pin 5). if the error amplifier outputs are not restored to the normal voltage range before the capacitor voltage reaches about 0.7 v, the latch circuit is actuated to fix the output terminals (out) at the h level. to reset the actuated protection circuit, turn the power supply on back.
mb3832a 15 n n n n method of setting for external synchronous oscillation for external synchronous oscillation, connect a timing capacitor (c t ), a timing resistor (r t ), and an external sync signal to the ct, rt, and sync terminals, respectively. in this case, select the c t and r t so that the oscillation frequency is 5% to 10% lower than the frequency of the external synchronous signal excluding the setting error of the oscillation frequency. the duty cycle (t1/ t) of the external sync signal must be set within a range from 10% to 90%. + - - + + - sq r sq r 3 4 sync c t 2i* 3i* 1.9 v c t v ref 1.3 v h level: on *: | = vrt/r t , vrt (pin voltage at pin 2) = 1.0 v (typical) 1.4 v latch2 latch1 t1 t 1.9 v v ct 1.3 v 0 v 5.0 v v sync 1.9 v v ct 1.3 v 0 v 5.0 v v sync tt

mb3832a 16 n n n n treatment of unused cscp pin when the timer-latch short-circuit protection circuit is not used, connect the cscp terminal (pin 5) to the gnd at the shortest distance. n n n n oscillator frequency setting the oscillator frequency can be set by connecting a timing capacitor (c t ) to the ct terminal (pin 3) and a timing resistor (r t ) to the rt terminal (pin 2). oscillator frequency: fosc 5 11 cscp gnd treatment of the cscp terminal when not used fosc (khz) 936000 c t (pf) r t (k w )
mb3832a 17 n methods of setting the dead time when the device is set for step-up inverted output based on the flyback method, the output transistor is fixed to a full-on state (on duty = 100%) when the power supply is turned on. to prevent this problem, you may determine the voltage at the dtc terminal (pin 16) from the v ref voltage so you can set the output transistors dead time (maximum on-duty period) as shown in figure a below. when the voltage at the dtc terminal (pin 16) is higher than the triangular wave output voltage from the oscillator, the output transistor is turned off. the dead time calculation formula assuming that triangular wave amplitude 0.6 v and triangular wave minimum voltage 1.3 v is given below. duty (on) 100 [%], v dt = v ref when the dtc terminal is not used, connect it directly to the vref terminal. . . = . . = . . = 0.6 v v dt C 1.3 v r 1 + r 2 r 2 1 vref 16 dtc r 1 r 2 v dt 1 vref 16 dtc ? figure a setting the dead time ? figure b not setting the dead time
mb3832a 18 n methods of setting the soft start time to prevent surge currents when the ic is turned on, you can set a soft start using the dtc terminal (pin 16). when power is switched on, the current begins charging the capacitor (cdt) connected the dtc terminal. the soft start process operates by comparing the soft start setting voltage, which is proportional to the dtc terminal voltage, with the triangular waveform, and varying the on-duty of the out terminal (pin 19). the soft start time until the on duty reaches 50 % is determined by the following equation: for figure c soft start time (time until output on duty = 50%) ts (s) = c dt (f) r dt ( w ) ln(1 - 1.6/2.5) : = 1.022 c dt (f) r dt ( w ) for figure d soft start time (time until output on duty = 50%) ts (s) = - c dt (f) r 1 ( w ) r 2 ( w ) r 1 ( w ) + r 2 ( w ) 1.6 (r 1 ( w ) + r 2 ( w )) 2.5r 2 ( w ) ln (1 - ) 1 vref 16 dtc r dt c dt 1 vref 16 dtc r 1 r 2 c dt ? figure c setting a soft start ? figure d setting the dead time and a soft start
mb3832a 19 n n n n equivale circuit (ctl, sync terminal) 17 4 ctl sync v cc 1.4 v ? ctl terminal ?sync terminal
mb3832a 20 n n n n application example (step-down scheme) - + - + + + - + - + - + - - + 18 10 15 14 13 6 7 8 16 5 12 19 20 17 11 1 3 2 9 4 out ve v cc ctl v cc gnd 68 m f gnd (for load) mtd20p03hdl: made by motorola inc. mbrs130lt3: made by motorola inc. 18 m h rs 0.033 w v o (12.6 v) mtd20p03hdl mbrs130 lt3 0.1 m f 0.1 m f 5.1 w 1 v 2.1 v 1.1 v latch uvlo osc ref bias ctl r bias s 5 v 2.5 v 1.3 v 1.9 v sync 0 v + inc - inc - in2 fb2 fb1 + in2 + in2 - in1 + in1 dtc cscp cout 25 current amp. error amp.2 error amp.1 pwm comp. dtc comp. scp comp. out 100 m f 2.2 m f 0.1 m f 0.033 m f 0.22 m f 1 m a 0.22 m f 100 k w 5.1 k w 33 k w vin 10 k w 12k w rt 390pf ct vref 10 k w gnd 10 k w 10 k w a* b* c* 3.9 k w 470 k w 5.1 k w 20.6 k w *: a: set the charging current to 3 a. b: set the charging current to 2 a. c: set the charging current to 1 a. charging current setting synchronous signal
mb3832a 21 n n n n reference data soft start operation waveforms 14 12 10 8 6 4 2 0 0 0.5 1 1.5 2 2.5 3 3.5 4 vin = 16 v ta = + 25 c v + in2 = v ref ( + in2 ? a) v + in2 = v ref * 2/3 ( + in2 ? b) v + in2 = v ref /3 ( + in2 ? c) output voltage vs. output current characteristics output voltage v o (v) output current i o (a) 20 15 10 5 0 10 5 0 0 40 80 120 160 200 t(ms) v o (v) ctl(v) vin = 16 v ctl = 5 v rl = 5 w (2.52 a) 100 90 0 % 10
mb3832a 22 n n n n notes on use ? take account of common impedance when designing the earth line on a printed wiring board. ? take measures against static electricity. - for semiconductors, use antistatic or conductive containers. - when storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container. - the work table, tools and measuring instruments must be grounded. - the worker must put on a grounding device containing 250 k w to 1 m w resistors in series. ? do not apply a negative voltage - applying a negative voltage of - 0.3 v or less to an lsi may generate a parasitic transistor, resulting in malfunction. n n n n ordering information part number package remarks mb3832apfv 20-pin plastic ssop (fpt-20p-m03)
mb3832a 23 n n n n package dimension 20-pin plastic ssop (fpt-20p-m03) note 1) *1 : resin protrusion. (each side : + 0.15 (.006) max) . note 2) *2 : these dimensions do not include resin protrusion. note 3) pins width and pins thickness include plating thickness. note 4) pins width do not include tie bar cutting remainder. dimensions in mm (inches) . note : the values in parentheses are reference values. c 2003 fujitsu limited f20012s-c-4-6 6.500.10(.256.004) 4.400.10 6.400.20 (.252.008) (.173.004) .049 C.004 +.008 C0.10 +0.20 1.25 (mounting height) 0.10(.004) 0.65(.026) 0.240.08 (.009.003) 1 10 20 11 "a" 0.100.10 (stand off) 0.170.03 (.007.001) m 0.13(.005) (.004.004) details of "a" part 0~8 ? (.024.006) 0.600.15 (.020.008) 0.500.20 0.25(.010) lead no. index * 1 * 2
mb3832a fujitsu limited all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of fujitsu semiconductor device; fujitsu does not warrant proper operation of the device with respect to use based on such information. when you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of fujitsu or any third party or does fujitsu warrant non-infringement of any third-partys intellectual property right or other right by using such information. fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. the products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). please note that fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. any semiconductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade law of japan, the prior authorization by japanese government will be required for export of those products from japan. f0308 ? fujitsu limited printed in japan

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